开发工具/系统

方案关键器件表：

型号	品牌	产品描述	类型
Incisive Verification Kit	Cadence	自动化和简化了可重复使用的先进的验证技术的采用，提高效率和可预见性。使用交互式研讨会和集成的Incisive工具流程来学习掌握指标驱动验证方法学。	功能验证
NanoRoute Advanced Digital Router	Cadence	支持对时序、面积、功耗、信号完整性和可制造性约束的布线收敛，同时在速度和容量上全力支持giga-gate/GHz和先进工艺节点设计。	数字实现
Open Verification Methodology	Cadence	Facilitates true SystemVerilog interoperability with a standard library and a proven methodology. Eases the development and usage of plug-and-play verification IP.	功能验证
OrCAD Capture and Capture CIS	Cadence	An industry standard in schematic design entry	OrCAD 产品
OrCAD PCB Designer	Cadence	Proven, easy-to-use PCB place-and-route technology	OrCAD 产品
Palladium Dynamic Power Analysis	Cadence	将cadence Palladium 加速仿真技术扩展到系统级动态功耗分析 (DPA)。通过运行Palladium仿真器，工程师不但可以利用真实的系统环境来分析员软件，而且可以通过DPA技术来优化功耗和性能。	系统设计与验证
Palladium series	Cadence	提供业界最具扩展性，最高吞吐量，多用户加速和仿真平台。使设计人员能够快速模拟系统级设计环境，早日进入硬件/软件协同验证，并在硅流片前几个月就进行芯片确认工作。	系统设计与验证
Palladium XP Verification Computing Platform	Cadence	业界最先进的软/硬件验证计算平台，将加速和仿真能力集成在单一环境中，以提高验证吞吐量和效率。	系统设计与验证
PSpice A/D and Advanced Analysis	Cadence		OrCAD 产品
Rapid Prototyping Platform	Cadence	作为Cadence系统开发套件的一部分，能完整嵌入软件实现和调试流程的基于FPGA的原型设计解决方案，以提高早期的软件开发和高性能系统验证能。	系统设计与验证
SoC Encounter RTL-to-GDSII System	Cadence	整合了RTL综合、芯片虚拟原型、自动布局综合、时钟树综合、可制造性设计与良率设计、低功耗和混合信号设计、还有纳米级布线。使得工程师可以在设计周期的开始就可以综合出一个平展式的虚拟原型实现。	数字实现
Virtual System Platform	Cadence	作为Cadence系统开发套件的一部分，能自动产生和构建虚拟原型，调试软件，并将其为软件团队所用。从而使得软件的开发可以提前几个月时间。	系统设计与验证
Virtuoso Accelerated Parallel Simulator	Cadence	Delivers scalable performance and capacity at full Spectre-level accuracy across a broad range of complex analog, RF, and mixed-signal blocks and subsystems.	定制IC设计
Virtuoso Accelerated Parallel Simulator	Cadence	Delivers scalable performance and capacity at full Spectre-level accuracy across a broad range of complex analog, RF, and mixed-signal blocks and subsystems.	射频集成电路设计
Virtuoso AMS Designer	Cadence	Provides an advanced mixed-signal simulation solution for design and verification of analog, RF, memory, and mixed-signal SoCs.	定制IC设计
Virtuoso AMS Designer	Cadence	Provides an advanced mixed-signal simulation solution for design and verification of analog, RF, memory, and mixed-signal SoCs.	射频集成电路设计
Virtuoso Analog Design Environment	Cadence	Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.	定制IC设计
Virtuoso Analog Design Environment	Cadence	Provides a comprehensive array of capabilities for electrical and statistical analysis, verification, and optimization of analog/mixed-signal designs, including the interfaces to many industry-standard simulators.	射频集成电路设计
Virtuoso Chip Assembly Router	Cadence	Performs automated and interactive block and chip authoring for custom-digital, mixed-signal, and analog designs—at any level of the hierarchy.	定制IC设计
Virtuoso DFM	Cadence	Accurately assess both physical and electrical variability to ensure the manufacturability of custom and mixed-signal designs, libraries, and IP.	定制IC设计

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