Part of the Cadence System Development Suite, the Rapid Prototyping Platform is an advanced FPGA-based prototyping solution for early software development and high-performance system validation. It combines high-capacity FPGA boards with a complete implementation and debug software flow, providing unprecedented design implementation speed and ease of use. Compatible with the Cadence Verification Computing Platform (Palladium XP) and SpeedBridge rate adapters, the Rapid Prototyping Platform allows for quick and smooth transition of an existing emulation environment into a high-performance rapid prototype. With its fully integrated implementation and debug software flow, engineers can reduce prototype bring-up from months to weeks.
Features/Benefits
Offers the fastest prototype bring-up by enabling reuse of the existing Palladium environment including clock definitions and memory modeling
Fully automates multi-FPGA partitioning with advanced pin-multiplexing
Delivers the highest model accuracy with support for complex ASIC-style clocking and memory compilation
Automatically generates a post-partitioning model to validate implementation correctness and accelerate prototype bring-up
Ensures superior debug with waveform capture for offline debugging, as well as compatibility with the Palladium system for interactive root cause analysis
Offers flexibility with support of common interfaces and connectors for custom and off-the-shelf daughter cards
Compatible with all Cadence SpeedBridge Adapters
Includes all required hardware and software components for design input, synthesis, debug, multi-FPGA partitioning, and FPGA place-and-route