开发工具/系统-射频集成电路设计-Virtuoso Analog Design Environment

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Designed to help users create manufacturing-robust designs, Cadence® Virtuoso® Analog Design Environment is the advanced design and simulation environment for the Virtuoso platform. It gives designers access to a new parasitic estimation and comparison flow and optimization algorithms that help to center designs better for yield improvement and advanced matching and sensitivity analyses. By supporting extensive exploration of multiple designs against their objective specifications, Virtuoso Analog Design Environment sets the standard in fast and accurate design verification.

Features/Benefits

Reduced learning curve with a simulator-independent environment
Maximum efficiency in the script-driven mode
Accelerated debug process using a variety of built-in analog analysis tools
Facilitated design correction via easy comparison of pre- and post-parasitic extracted designs
Quick detection of circuit problems via a clear visualization cockpit

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Virtuoso Analog Design Environment

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