| Model | Description | RoHS |
|---|---|---|
| Allegro AMS Simulator | Delivers advanced simulation capabilities for analog/mixed-signal development. Provides design entry feedback, component modeling, stress analysis, and yield projections. | No |
| Allegro Design Authoring | Provides a multi-style logic authoring-driven, constraint-driven flow. Manages design constraints, net classes, buses, extended nets, and differential pairs. | No |
| Allegro Design Entry Capture / Capture CIS | Enables rapid, intuitive schematic editing and hierarchical design with optimized sharing and reuse of components and subassemblies. Automates integration of field programmable gate arrays (FPGAs) and programmable logic devices (PLDs). | No |
| Allegro Design Publisher | Converts Allegro Design Authoring schematics and Allegro PCB Designer PCBs to content-rich PDFs?creating a secure, single-file representation of the design. | No |
| Allegro Design Workbench | Provides a collaborative environment that integrates design tools, library development and distribution, data management, and process control?all aimed at increasing productivity, reducing errors, and eliminating redundancy. | No |
| Allegro FPGA System Planner | The Allegro FPGA System Planner offers a complete, scalable technology for FPGA-PCB co-design that allows users to automatically create an optimum placement-aware initial pin assignment for one or more FPGAs.? It also allows users to optimize pin assignme | No |
| Allegro PCB Designer | Speeds designs from placement and routing through to manufacturing with powerful features such as design partitioning, RF design capabilities, and interconnect design planning. Production-proven to increase productivity and help engineers quickly ramp up | No |
| Allegro PCB Librarian | Significantly accelerates creation and validation of schematic, PCB footprint and digital simulation map files. This enables librarians, engineers and/or designers to reduce development time for high-pin-count devices from days to minutes. | No |
| Cadence OrCAD Capture / Capture CIS | Offers full-featured schematic editing of complex designs through hierarchical and variant design capabilities for fast, intuitive design capture. Robust component information system (CIS) promotes use of preferred, current parts to accelerate design capt | No |
| Cadence OrCAD FPGA System Planner | The OrCAD FPGA System Planner offers technology for FPGA-PCB co-design that allows users to automatically create an optimum placement-aware initial pin assignment for an FPGA. | No |
| Cadence OrCAD PCB Designer | Offers a proven, scalable, easy-to-use PCB editing and routing solution. Delivers a comprehensive feature set and seamless PCB design environment to take designs from concept to production. | No |
| Cadence OrCAD PCB SI | Provides detailed interconnect modeling and electrical analysis. Enables pre- and post-layout signal integrity analysis at any stage. | No |
| Cadence PSpice A/D and Advanced Analysis | Simulates analog/mixed-signal circuits quickly and completely to improve productivity and data integrity. Advanced Analysis prevents board failures by determining which components are over-stressed using Smoke analysis or by observing component yields usi | No |
| Allegro PCB SI | Provides advanced interconnect modeling for constraint development and electrical analysis of multi-gigabit designs. Simulates high-speed signals, systems, and power delivery networks at the single- or multi-board level. | No |
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