开发工具/系统-射频集成电路设计-Cadence Physical Verification System

English 中文

所有产品

应用方案

新闻中心

关于科通

当前位置：首页 > 所有产品 > 开发工具/系统 > 射频集成电路设计 > Cadence Physical Verification System

品牌：Cadence

描述：在一种解决方案中提供从前端到后端设计，实现并且签收的整个流程。加快设计规则检测和版图与逻辑设计一致性验证的周期。

包装：

封装：

无铅情况/ROHS：有铅

类别：射频集成电路设计

经营商：科通芯城自营

序号	PDF	描述
1	Assura Physical Verification Datasheet	Assura Physical Verification Datasheet
2	Cadence Physical Verification System Datasheet	Cadence Physical Verification System Datasheet
3	Interactive Short Locator: Establishing Efficiency and Predictability in the LVS Short Debug Process	Interactive Short Locator: Establishing Efficiency and Predictability in the LVS Short Debug Process for Advanced SoC Designs Technical Paper
4	Virtuoso Custom Design Demo: Solving New Challenges in Nanometer Design with Assura Physical Verific	Virtuoso Custom Design Demo: Solving New Challenges in Nanometer Design with Assura Physical Verification

深圳市科通技术股份有限公司客服电话：(+86)755-26018083 邮箱：cs@comtech.cn