Already proven in thousands of tapeouts, Encounter Conformal EC is the industry’s most widely supported independent equivalence checking product. It is production-proven on more physical design closure products, advanced synthesis software, ASIC libraries, and IP cores than any other formal verification technology.
Benefits
Exhaustively verifies multi-million–gate ASICs and FPGAs several times faster than traditional gate-level simulation
Decreases the risk of missing critical bugs with independent verification technology
Enables faster, more accurate bug detection and correction throughout the entire design flow
Extends equivalence checking capability to complex datapaths and closes the RTL-to-layout verification gap (XL configuration)
Ensures RTL models perform the same functions as the corresponding transistor circuits implemented on silicon (GXL configuration)