专用IC-芯片组-QG5100MCH

参数	数值
Product name	Intel® 5100 Memory Controller
Code Name	Formerly San Clemente
Datasheet	Download Datasheet
Dual Independent Display	No
ECC Memory	True
FSB Speed	667MHz, 1066MHz, 1333MHz
Graphics Output	None
Integrated Graphics	No
Launch Date	Q4'07
License Required	No
Low Halogen Available	See MDDS
Max Memory	48 GB
Max TDP	25.7 Watts
Number of Memory Channels	2
Package Size	38.5mm x 42.5mm
TCase	105°C

这些基于四核、双核及单核英特尔® 至强® 处理器的平台采用 45 纳米和 65 纳米制程技术；拥有出色的性能、能效和极长的生命周期支持，是进行密集计算的存储与通信应用的理想选择。

英特尔® 虚拟化技术： 允许硬件平台作为多个虚拟平台。
Intel® 64 架构： 支持 64 位指令。
多核选项： 提高应对多线程应用的性能
英特尔® SSE4 指令： 47 条新指令用以提高应对媒体与高性能计算应用的性能。

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QG5100MCH

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序号	PDF	描述
1	Application Note: Alcatel-Lucent Converged IP Messaging Solution	Application Note: Alcatel-Lucent Converged IP Messaging Solution
2	Application Note: AP-485 Intel® Processor Identification and CPUID Instruction	Application Note: AP-485 Intel® Processor Identification and CPUID Instruction
3	Application Note: Designing Embedded Systems for Testability	Application Note: Designing Embedded Systems for Testability
4	Boundary Scan Description Language (BSDL): Intel® Xeon® Processor 5200 Series	Boundary Scan Description Language (BSDL): Intel® Xeon® Processor 5200 Series
5	Case Study: Migrating the Ericsson* Operations Support System: RISC or Intel® based Servers	Case Study: Migrating the Ericsson* Operations Support System: RISC or Intel® based Servers
6	Datasheet: Intel® 5100 Memory Controller Hub	Datasheet: Intel® 5100 Memory Controller Hub
7	Datasheet: Intel® 82576 Gigabit Ethernet (GbE) Controller	Datasheet: Intel® 82576 Gigabit Ethernet (GbE) Controller
8	Datasheet: Intel® 82576 Gigabit Ethernet (GbE) Controller	Datasheet: Intel® 82576 Gigabit Ethernet (GbE) Controller
9	Datasheet: Intel® 82599 10 Gigabit Ethernet (GbE) Controller	Datasheet: Intel® 82599 10 Gigabit Ethernet (GbE) Controller
10	Datasheet: Intel® 82599 10 Gigabit Ethernet (GbE) Controller	Datasheet: Intel® 82599 10 Gigabit Ethernet (GbE) Controller
11	Datasheet: Intel® I/O Controller Hub 9 (ICH9) Family	Datasheet: Intel® I/O Controller Hub 9 (ICH9) Family
12	Datasheet: Quad-Core Intel® Xeon® Processor 5400 Series	Datasheet: Quad-Core Intel® Xeon® Processor 5400 Series
13	DB400/800 Differential Clock Buffer Specification	DB400/800 Differential Clock Buffer Specification
14	Design Guide: 603-Pin Socket	Design Guide: 603-Pin Socket
15	Design Guide: ITP700 Debug Port	Design Guide: ITP700 Debug Port
16	Design Guide: LGA771 Socket	Design Guide: LGA771 Socket
17	Design Guide: Voltage Regulator Module (VRM) 9.0 DC-DC Converter	Design Guide: Voltage Regulator Module (VRM) 9.0 DC-DC Converter
18	Design Guide: Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.0	Design Guide: Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.0
19	Design Guide: Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1	Design Guide: Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1
20	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller H	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller Hub Chipset
21	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller H	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller Hub Chipset
22	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller H	Development Kit User Guide: Intel® Xeon® Processor 5000 Sequence and Intel® 5100 Memory Controller Hub Chipset
23	Intel® 5100 MCH Chipset Launch Presentation	Intel® 5100 MCH Chipset Launch Presentation
24	Power Profiling for Embedded Applications	Power Profiling for Embedded Applications
25	Product Brief: Intel® 5100 Memory Controller Hub Chipset for Embedded Computing	Product Brief: Intel® 5100 Memory Controller Hub Chipset for Embedded Computing
26	Product Brief: Intel® 82576 Gigabit Ethernet Controller	Product Brief: Intel® 82576 Gigabit Ethernet Controller
27	Product Brief: Intel® 82576 Gigabit Ethernet Controller	Product Brief: Intel® 82576 Gigabit Ethernet Controller
28	Product Brief: Intel® 82599 10 Gigabit Ethernet Controller (Network Connectivity)	Product Brief: Intel® 82599 10 Gigabit Ethernet Controller (Network Connectivity)
29	Product Brief: Intel® 82599 10 Gigabit Ethernet Controller (Network Connectivity)	Product Brief: Intel® 82599 10 Gigabit Ethernet Controller (Network Connectivity)
30	Specification Update: Intel® 5100 Memory Controller Hub (MCH) Chipset Specification Update	Specification Update: Intel® 5100 Memory Controller Hub (MCH) Chipset Specification Update
31	Specification Update: Intel® 82576 Gigabit Ethernet Controller	Specification Update: Intel® 82576 Gigabit Ethernet Controller
32	Specification Update: Intel® 82576 Gigabit Ethernet Controller	Specification Update: Intel® 82576 Gigabit Ethernet Controller
33	Specification Update: Intel® Xeon® Processor 5200 Series	Specification Update: Intel® Xeon® Processor 5200 Series
34	Specification Update: Quad-Core Intel® Xeon® Processor 5400 Series	Specification Update: Quad-Core Intel® Xeon® Processor 5400 Series
35	Thermal & Mechanical Design Guide: Intel® 5100 Memory Controller Hub Chipset	Thermal & Mechanical Design Guide: Intel® 5100 Memory Controller Hub Chipset
36	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor 5200 Series	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor 5200 Series
37	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor 5200 Series in Embedded Applications	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor 5200 Series in Embedded Applications
38	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor L5408 Series in Embedded Applications	Thermal & Mechanical Design Guidelines: Intel® Xeon® Processor L5408 Series in Embedded Applications
39	Thermal & Mechanical Design Guidelines: Quad-Core Intel® Xeon® Processor 5400 Series	Thermal & Mechanical Design Guidelines: Quad-Core Intel® Xeon® Processor 5400 Series
40	White Paper: Accessing PCI Express* Registers When Using Intel® Chipsets	White Paper: Accessing PCI Express* Registers When Using Intel® Chipsets
41	White Paper: Asymmetric Multi-Processing, Embedded and Communication MC Usage Model	White Paper: Asymmetric Multi-Processing, Embedded and Communication MC Usage Model
42	White Paper: Choosing the Right Storage Solution for Your Embedded Application	White Paper: Choosing the Right Storage Solution for Your Embedded Application
43	White Paper: Consolidating Communications and Networking Workloads onto One Architecture	White Paper: Consolidating Communications and Networking Workloads onto One Architecture
44	White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms	White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms
45	White Paper: Designing Systems without a Suspend Supply	White Paper: Designing Systems without a Suspend Supply
46	White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles	White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles
47	White Paper: Extending the World’s Most Popular Processor Architecture	White Paper: Extending the World’s Most Popular Processor Architecture
48	White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms	White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms
49	White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on I	White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on Intel® Architecture
50	White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on I	White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on Intel® Architecture
51	White Paper: Interfacing I²C Devices to Intel's SMBus Controller	White Paper: Interfacing I²C Devices to Intel's SMBus Controller
52	White Paper: Introducing the 45nm Next-Generation Intel® Core Microarchitecture	White Paper: Introducing the 45nm Next-Generation Intel® Core Microarchitecture
53	White Paper: JTAG 101	White Paper: JTAG 101
54	White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization	White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization
55	White Paper: Optimizing Embedded System Performance—Impact of Data Prefetching on a Medical Imaging	White Paper: Optimizing Embedded System Performance—Impact of Data Prefetching on a Medical Imaging Application
56	White Paper: PCB Stackup Overview for Intel® Architecture Platforms—Layout and Signal Integrity Cons	White Paper: PCB Stackup Overview for Intel® Architecture Platforms—Layout and Signal Integrity Considerations
57	White Paper: Platform-Level error Handling Strategies for Intel® Systems	White Paper: Platform-Level error Handling Strategies for Intel® Systems
58	White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture	White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture Systems
59	White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts	White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts
60	White Paper: Seven Tips to Get Started on Embedded Multi-Core	White Paper: Seven Tips to Get Started on Embedded Multi-Core
61	White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines	White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines
62	White Paper: Thermal Design Considerations for Embedded Applications	White Paper: Thermal Design Considerations for Embedded Applications
63	White Paper: Thermal Guidance for AdvancedTCA Designs	White Paper: Thermal Guidance for AdvancedTCA Designs
64	White Paper: Upgrading to Multi-Core Ecosystem Keeps Car Simulator Running in the Fast Lane	White Paper: Upgrading to Multi-Core Ecosystem Keeps Car Simulator Running in the Fast Lane
65	White Paper: What Does It Mean to Be I/O Bound?	White Paper: What Does It Mean to Be I/O Bound?
66	产品简介： 45 纳米英特尔® 至强® 处理器 5400/5200 系列	产品简介： 45 纳米英特尔® 至强® 处理器 5400/5200 系列
67	开发套件: 四核和双核英特尔®至强®处理器5000系列和英特尔®5100内存控制器芯片组开发套件	开发套件: 四核和双核英特尔®至强®处理器5000系列和英特尔®5100内存控制器芯片组开发套件